Le Fri, 20 May 2022 09:13:23 +0200, Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> a écrit : > Hi Clément, > > On Thu, May 19, 2022 at 5:32 PM Clément Léger <clement.leger@xxxxxxxxxxx> wrote: > > Add bindings for Renesas RZ/N1 Advanced 5 port switch. This switch is > > present on Renesas RZ/N1 SoC and was probably provided by MoreThanIP. > > This company does not exists anymore and has been bought by Synopsys. > > Since this IP can't be find anymore in the Synospsy portfolio, lets use > > Renesas as the vendor compatible for this IP. > > > > Signed-off-by: Clément Léger <clement.leger@xxxxxxxxxxx> > > Thanks for your patch! > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml > > @@ -0,0 +1,131 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Renesas RZ/N1 Advanced 5 ports ethernet switch > > + > > +maintainers: > > + - Clément Léger <clement.leger@xxxxxxxxxxx> > > + > > +description: | > > + The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and > > + handles 4 ports + 1 CPU management port. > > + > > +allOf: > > + - $ref: dsa.yaml# > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - renesas,r9a06g032-a5psw > > + - const: renesas,rzn1-a5psw > > + > > + reg: > > + maxItems: 1 > > + > > + mdio: > > + $ref: /schemas/net/mdio.yaml# > > + unevaluatedProperties: false > > + > > + clocks: > > + items: > > + - description: AHB clock used for the switch register interface > > + - description: Switch system clock > > + > > + clock-names: > > + items: > > + - const: hclk > > + - const: clk > > (Good, "clock-names" is present ;-) > > Missing "power-domains" property. > I do not use pm_runtime* in the switch driver. I should probably do that right ? > > +examples: > > + - | > > + #include <dt-bindings/gpio/gpio.h> > > + #include <dt-bindings/clock/r9a06g032-sysctrl.h> > > + > > + switch@44050000 { > > + compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw"; > > + reg = <0x44050000 0x10000>; > > + clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, <&sysctrl R9A06G032_CLK_SWITCH>; > > + clock-names = "hclk", "clk"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pins_mdio1>, <&pins_eth3>, <&pins_eth4>; > > Usually we don't list pinctrl-* properties in examples. > Acked, I'll remove that. > The rest LGTM (from an SoC integration PoV), so with the above fixed > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds -- Clément Léger, Embedded Linux and Kernel engineer at Bootlin https://bootlin.com
