On 5/12/22 10:02 AM, Paolo Abeni wrote:
>> RZ/V2M has a separate gPTP reference clock that is used when the
>> AVB-DMAC Mode Register (CCC) gPTP Clock Select (CSEL) bits are
>> set to "01: High-speed peripheral bus clock".
>> Therefore, add a feature that allows this clock to be used for
>> gPTP.
>>
>> Signed-off-by: Phil Edworthy <phil.edworthy@xxxxxxxxxxx>
>> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>> Reviewed-by: Sergey Shtylyov <s.shtylyov@xxxxxx>
[...]
>> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
>> index 8ccc817b8b5d..ef6967731263 100644
>> --- a/drivers/net/ethernet/renesas/ravb_main.c
>> +++ b/drivers/net/ethernet/renesas/ravb_main.c
[...]
>> @@ -2721,6 +2725,15 @@ static int ravb_probe(struct platform_device *pdev)
>> }
>> clk_prepare_enable(priv->refclk);
>>
>> + if (info->gptp_ref_clk) {
>> + priv->gptp_clk = devm_clk_get(&pdev->dev, "gptp");
>> + if (IS_ERR(priv->gptp_clk)) {
>> + error = PTR_ERR(priv->gptp_clk);
>> + goto out_release;
>> + }
>> + clk_prepare_enable(priv->gptp_clk);
>> + }
>> +
>
> I guess you need to a conditional
>
> clk_disable_unprepare(info->gptp_ref_clk)
>
> in the error path? And even in ravb_remove()?
Indeed! How could I miss it? :-/
[...]
MBR, Sergey
