On 5/4/22 5:54 PM, Phil Edworthy wrote:
> Currently, when the HW has a single interrupt, the driver uses the
> TIC, RIC0 registers to enable and disable RX/TX interrupts. When
> the HW has multiple interrupts, it uses the TIE, TID, RIE0, RID0
> registers.
>
> However, other devices, e.g. RZ/V2M, have multiple irqs and use
> the TIC, RIC0 registers.
s/use/have only/?
> Therefore, split this into a separate feature.
>
> Signed-off-by: Phil Edworthy <phil.edworthy@xxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> drivers/net/ethernet/renesas/ravb.h | 1 +
> drivers/net/ethernet/renesas/ravb_main.c | 5 +++--
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
> index 15aa09d93ff0..67a240665cd2 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
> @@ -1027,6 +1027,7 @@ struct ravb_hw_info {
> unsigned tx_counters:1; /* E-MAC has TX counters */
> unsigned carrier_counters:1; /* E-MAC has carrier counters */
> unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */
> + unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable regs */
Perhaps just irq_en_dis?
> unsigned gptp:1; /* AVB-DMAC has gPTP support */
> unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */
> unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */
[...]
MBR, Sergey
