On Fri, Apr 22, 2022 at 9:29 AM Geert Uytterhoeven
<geert+renesas@xxxxxxxxx> wrote:
> Unlike on R-Car Gen3 SoCs, setting a bit to zero in a GPIO / Peripheral
> Function Select Register (GPSRn) on R-Car S4-8 is not always sufficient
> to configure a pin for GPIO. For I2C-capable pins, the I2C function
> must also be explicitly disabled in the corresponding Module Select
> Register (MODSELn).
>
> Add the missing FN_SEL_I2Ci_0 function enums to the pinmux_data[] array
> by temporarily overriding the GP_2_j_FN function enum to expand to two
> enums: the original GP_2_j_FN enum to configure the GPSR register bits,
GP_1_j_FN
> and the missing FN_SEL_I2Ci_0 enum to configure the MODSEL register
> bits.
>
> Fixes: 030ac6d7eeff81e3 ("pinctrl: renesas: Initial R8A779F0 PFC support")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
queuing in renesas-pinctrl-for-v5.19, with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
