Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 15335e9ca06b..55bf4b72304f 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -418,12 +418,20 @@ adc: adc@10059000 {
};
sbc: spi@10060000 {
+ compatible = "renesas,r9a07g043-rpc-if",
+ "renesas,rzg2l-rpc-if";
reg = <0 0x10060000 0 0x10000>,
<0 0x20000000 0 0x10000000>,
<0 0x10070000 0 0x10000>;
+ reg-names = "regs", "dirmap", "wbuf";
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G043_SPI_CLK2>,
+ <&cpg CPG_MOD R9A07G043_SPI_CLK>;
+ resets = <&cpg R9A07G043_SPI_RST>;
+ power-domains = <&cpg>;
#address-cells = <1>;
#size-cells = <0>;
- /* place holder */
+ status = "disabled";
};
cpg: clock-controller@11010000 {
--
2.25.1
