[PATCH 0/4] Add RZ/G2UL CLK and Reset entries for RSPI,TSU,ADC and SPI Multi IO Bus Controller

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



This patch series aims to add CLK and Reset entries for SPI Multi I/O
Bus Controller,RSPI,TSU and ADC found on RZ/G2UL SoC to RZ/G2L CPG driver.

Biju Das (4):
  clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O
    Bus Controller
  clk: renesas: r9a07g043: Add RSPI clock and reset entries
  clk: renesas: r9a07g043: Add TSU clock and reset entry
  clk: renesas: r9a07g043: Add clock and reset entries for ADC

 drivers/clk/renesas/r9a07g043-cpg.c | 39 +++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

-- 
2.25.1




[Index of Archives]     [Linux Samsung SOC]     [Linux Wireless]     [Linux Kernel]     [ATH6KL]     [Linux Bluetooth]     [Linux Netdev]     [Kernel Newbies]     [IDE]     [Security]     [Git]     [Netfilter]     [Bugtraq]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Linux ATA RAID]     [Samba]     [Device Mapper]

  Powered by Linux