Hi Geert,
On Thu, 28 Apr 2022 11:49:28 +0200
Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> Hi Hervé
>
> On Fri, Apr 22, 2022 at 2:09 PM Herve Codina <herve.codina@xxxxxxxxxxx> wrote:
> > Add the device node for the r9a06g032 internal PCI bridge device.
> >
> > Signed-off-by: Herve Codina <herve.codina@xxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/arch/arm/boot/dts/r9a06g032.dtsi
> > +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> > @@ -212,6 +212,35 @@ gic: interrupt-controller@44101000 {
> > interrupts =
> > <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> > };
> > +
> > + pci_usb: pci@40030000 {
> > + compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
> > + device_type = "pci";
> > + clocks = <&sysctrl R9A06G032_HCLK_USBH>,
> > + <&sysctrl R9A06G032_HCLK_USBPM>,
> > + <&sysctrl R9A06G032_CLK_PCI_USB>;
> > + clock-names = "hclk_usbh", "hclk_usbpm", "clk_pci_usb";
>
> The clock names need an update, cfr. my comment on the bindings.
Sure.
>
> The rest LGTM, so with the above fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
Thanks for the review.
Regards,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
