Fillup the OSTM{0,1,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 24 +++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index 60db9b02e0a7..d161600495aa 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -704,18 +704,36 @@ wdt2: watchdog@12800400 {
};
ostm0: timer@12801000 {
+ compatible = "renesas,r9a07g043-ostm",
+ "renesas,ostm";
reg = <0x0 0x12801000 0x0 0x400>;
- /* place holder */
+ interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G043_OSTM0_PCLK>;
+ resets = <&cpg R9A07G043_OSTM0_PRESETZ>;
+ power-domains = <&cpg>;
+ status = "disabled";
};
ostm1: timer@12801400 {
+ compatible = "renesas,r9a07g043-ostm",
+ "renesas,ostm";
reg = <0x0 0x12801400 0x0 0x400>;
- /* place holder */
+ interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G043_OSTM1_PCLK>;
+ resets = <&cpg R9A07G043_OSTM1_PRESETZ>;
+ power-domains = <&cpg>;
+ status = "disabled";
};
ostm2: timer@12801800 {
+ compatible = "renesas,r9a07g043-ostm",
+ "renesas,ostm";
reg = <0x0 0x12801800 0x0 0x400>;
- /* place holder */
+ interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>;
+ resets = <&cpg R9A07G043_OSTM2_PRESETZ>;
+ power-domains = <&cpg>;
+ status = "disabled";
};
};
--
2.25.1
