Hi Shimoda-san,
On Mon, Apr 25, 2022 at 8:42 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> R-Car V4H (r8a779g0) has PLL4 so that add CLK_TYPE_GEN4_PLL4.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> @@ -253,11 +253,11 @@ static const unsigned int r8a779a0_crit_mod_clks[] __initconst = {
> #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 13) | \
> (((md) & BIT(13)) >> 13))
> static const struct rcar_gen4_cpg_pll_config cpg_pll_configs[4] = {
> - /* EXTAL div PLL1 mult/div PLL2 mult/div PLL3 mult/div PLL5 mult/div PLL6 mult/div OSC prediv */
> - { 1, 128, 1, 0, 0, 0, 0, 192, 1, 0, 0, 16, },
> - { 1, 106, 1, 0, 0, 0, 0, 160, 1, 0, 0, 19, },
> - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
> - { 2, 128, 1, 0, 0, 0, 0, 192, 1, 0, 0, 32, },
> + /* EXTAL div PLL1 mult/div PLL2 mult/div PLL3 mult/div PLL4 mult/div PLL5 mult/div PLL6 mult/div OSC prediv */
> + { 1, 128, 1, 0, 0, 0, 0, 144, 1, 192, 1, 0, 0, 16, },
> + { 1, 106, 1, 0, 0, 0, 0, 120, 1, 160, 1, 0, 0, 19, },
> + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
> + { 2, 128, 1, 0, 0, 0, 0, 128, 1, 192, 1, 0, 0, 32, },
144?
With that fixed (I can fix that while applying)
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
