Hi Biju, On Thu, Apr 21, 2022 at 6:31 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > The RZ/G2L LCD controller is composed of Frame Compression Processor > (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). > > The DU module supports the following hardware features > − Display Parallel Interface (DPI) and MIPI LINK Video Interface > − Display timing master > − Generates video timings > − Selecting the polarity of output DCLK, HSYNC, VSYNC, and DE > − Supports Progressive > − Input data format (from VSPD): RGB888, RGB666 > − Output data format: same as Input data format > − Supporting Full HD (1920 pixels x 1080 lines) for MIPI-DSI Output > − Supporting WXGA (1280 pixels x 800 lines) for Parallel Output > > This patch document DU module found on RZ/G2L LCDC. > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml > @@ -0,0 +1,159 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/G2L Display Unit (DU) > + > +maintainers: > + - Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx> > + - Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > + > +description: | > + These DT bindings describe the Display Unit embedded in the Renesas RZ/G2L > + and RZ/V2L SoCs. > + > +properties: > + compatible: > + enum: > + - renesas,du-r9a07g044c # for RZ/G2LC compatible DU > + - renesas,du-r9a07g044l # for RZ/G2L compatible DU Please use the format "<manuf>,<soc>-<modulo>" for new bindings. I thought there was no need to differentiate RZ/G2LC and RZ/G2L, as the only difference is a wiring difference due to the limited number of pins on the RZ/G2LC package, as per your confirmation[1]? Hence please just use "renesas,r9a07g044-du". Do you want a family-specific compatible value ("rzg2l-"), as this IP block is shared by (at least) RZ/GL(C), RZ/V2L, and RZ/G2UL? > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - renesas,du-r9a07g044c > + then: > + properties: > + ports: > + properties: > + port@0: > + description: DSI 0 > + required: > + - port@0 > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - renesas,du-r9a07g044l > + then: > + properties: > + ports: > + properties: > + port@0: > + description: DPAD 0 > + port@1: > + description: DSI 0 > + required: > + - port@0 > + - port@1 Having different port numbers for the common DSI0 output indeed complicates matters ;-) [1] https://lore.kernel.org/r/OS0PR01MB5922C4C58329F538A418547886ED9@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
