Hi Kieran, Thank you for the patch. On Sat, Apr 09, 2022 at 07:57:06PM +0100, Kieran Bingham wrote: > When the CMM is enabled, the HDSE offset is further adjusted to > compensate for consumed pixels. > > Explain this further, with an extra comment at the point the offset is > adjusted. > > Suggested-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx> Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > index f361a604337f..23e1aedf8dc0 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c > @@ -300,6 +300,11 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) > | DSMR_DIPM_DISP | DSMR_CSPM; > rcar_du_crtc_write(rcrtc, DSMR, dsmr); > > + /* > + * When the CMM is enabled, an additional offset of 25 pixels must be > + * subtracted from the HDS (horizontal display start) and HDE > + * (horizontal display end) registers. > + */ > hdse_offset = 19; > if (rcrtc->group->cmms_mask & BIT(rcrtc->index % 2)) > hdse_offset += 25; -- Regards, Laurent Pinchart
