Hi Geert,
> Subject: Re: [PATCH v3 3/7] dt-bindings: clock: Add R9A07G043 CPG Clock
> and Reset Definitions
>
> On Wed, Mar 30, 2022 at 9:27 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> wrote:
> > On Tue, Mar 15, 2022 at 3:26 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> wrote:
> > > Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and
> > > module clock outputs, as listed in Table 7.1.4.2 ("Clock List
> > > r0.51") and also add Reset definitions referring to registers
> > > CPG_RST_* in Section 7.2.3 ("Register configuration") of the RZ/G2UL
> Hardware User's Manual (Rev.
> > > 0.51, Nov. 2021).
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > ---
> > > v2->v3:
> > > * Removed leading u/U from r9a07g043
> > > * renamed the file r9a07g043u-cpg.h->r9a07g043-cpg.h
> > > * Prepared Common Module Clock/Reset indices for RZ/G2UL and
> > > RZ/Five
> > > * Prepared RZ/G2UL specific Module Clock/Reset indices.
> >
> > Thanks for the update!
> >
> > > --- /dev/null
> > > +++ b/include/dt-bindings/clock/r9a07g043-cpg.h
>
> > > +/* R9A07G043 Common Module Clocks */
> > > +#define R9A07G043_IA55_CLK 0
> > > +#define R9A07G043_IA55_PCLK 1
> >
> > I think IA55 does not exist on RZ/Five?
>
> Looks like I was wrong, and it does exist.
Indeed you are correct. As per latest RZ/Five Hw manual,
the IP is called as IAX45.
Regards,
Biju
