Re: [PATCH v4 5/9] dma: dw: dmamux: Introduce RZN1 DMA router support

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On Thu, Mar 10, 2022 at 04:57:51PM +0100, Miquel Raynal wrote:
> The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional
> dmamux register located in the system control area which can take up to
> 32 requests (16 per DMA controller). Each DMA channel can be wired to
> two different peripherals.
> 
> We need two additional information from the 'dmas' property: the channel
> (bit in the dmamux register) that must be accessed and the value of the
> mux for this channel.
> 
> Aside from the driver introduction, as these devices are described as
> subnodes of the system controller, we also need the system controller
> (clock) driver to populate its children manually. Starting from now on,
> one child can be the dmamux.

In all DMA engine related patches the prefix should be "dmaengine:".

...

> +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec,
> +					struct of_dma *ofdma)
> +{
> +	struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
> +	struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev);
> +	struct rzn1_dmamux_map *map;
> +	unsigned int dmac_idx, chan, val;
> +	u32 mask;
> +	int ret;
> +
> +	map = kzalloc(sizeof(*map), GFP_KERNEL);
> +	if (!map)
> +		return ERR_PTR(-ENOMEM);

> +	if (dma_spec->args_count != 6) {
> +		kfree(map);
> +		return ERR_PTR(-EINVAL);
> +	}

You may move this check above and get one kfree() call less.
Moreover, you may use a goto approach to call kfree() from
a single point of exit.

> +	chan = dma_spec->args[0];
> +	map->req_idx = dma_spec->args[4];
> +	val = dma_spec->args[5];
> +	dma_spec->args_count -= 2;
> +
> +	if (chan >= RZN1_DMAMUX_SPLIT) {
> +		kfree(map);
> +		dev_err(&pdev->dev, "Invalid DMA request line: %u\n", chan);
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	if (map->req_idx >= RZN1_DMAMUX_LINES ||
> +	    (map->req_idx % RZN1_DMAMUX_SPLIT) != chan) {
> +		kfree(map);
> +		dev_err(&pdev->dev, "Invalid MUX request line: %u\n", map->req_idx);
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	dmac_idx = map->req_idx < RZN1_DMAMUX_SPLIT ? 0 : 1;
> +	dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", dmac_idx);
> +	if (!dma_spec->np) {
> +		kfree(map);
> +		dev_err(&pdev->dev, "Can't get DMA master\n");
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n",
> +		map->req_idx, dmac_idx, chan);
> +
> +	mask = BIT(map->req_idx);
> +	mutex_lock(&dmamux->lock);
> +	dmamux->used_chans |= mask;
> +	ret = r9a06g032_sysctrl_set_dmamux(mask, val ? mask : 0);
> +	mutex_unlock(&dmamux->lock);
> +	if (ret) {
> +		rzn1_dmamux_free(&pdev->dev, map);
> +		return ERR_PTR(ret);
> +	}
> +
> +	return map;
> +}

-- 
With Best Regards,
Andy Shevchenko





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