Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11):
- memory
- External input clock
- CPG
- DMA
- SCIF
It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/Makefile | 2 +
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 111 ++++++++++++++++++
.../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 25 ++++
3 files changed, 138 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
create mode 100644 arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index d000f6b131dc..a1217df9cd10 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -75,6 +75,8 @@ dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb
+dtb-$(CONFIG_ARCH_R9A07G043U) += r9a07g043u11-smarc.dtb
+
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
new file mode 100644
index 000000000000..144c1d6630bf
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK board
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r9a07g043u.dtsi"
+#include "rzg2ul-smarc-som.dtsi"
+#include "rz-smarc-common.dtsi"
+
+/ {
+ model = "Renesas SMARC EVK based on r9a07g043u11";
+ compatible = "renesas,smarc-evk", "renesas,r9a07g043u11", "renesas,r9a07g043u";
+};
+
+&canfd {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&ehci0 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&ehci1 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&hsusb {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&i2c0 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&i2c1 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+
+ wm8978: codec@1a {
+ compatible = "wlf,wm8978";
+ #sound-dai-cells = <0>;
+ reg = <0x1a>;
+ };
+};
+
+&ohci0 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&ohci1 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&phyrst {
+ status = "disabled";
+};
+
+&scif0 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+};
+
+&sdhi1 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-1;
+ /delete-property/ pinctrl-names;
+ /delete-property/ vmmc-supply;
+ status = "disabled";
+};
+
+&spi1 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&ssi0 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&usb2_phy0 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
+
+&usb2_phy1 {
+ /delete-property/ pinctrl-0;
+ /delete-property/ pinctrl-names;
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
new file mode 100644
index 000000000000..3bbb8fcd604c
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2UL SMARC SOM common parts
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+/ {
+ chosen {
+ bootargs = "ignore_loglevel";
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <24000000>;
+};
--
2.17.1
