Hi Biju, On Thu, Mar 3, 2022 at 10:55 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > > Subject: Re: [PATCH 1/2] dt-bindings: serial: renesas,scif: Update > > compatible string for RZ/G2UL SoC > > On Thu, Mar 3, 2022 at 9:59 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > > wrote: > > > Both RZ/G2UL and RZ/Five SoC's have SoC ID starting with R9A07G043. > > > To distinguish between them update the compatible string to > > > "renesas,scif-r9a07g043u" for RZ/G2UL SoC. > > > > > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > Thanks for your patch! > > > > > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml > > > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml > > > @@ -76,7 +76,7 @@ properties: > > > > > > - items: > > > - enum: > > > - - renesas,scif-r9a07g043 # RZ/G2UL > > > + - renesas,scif-r9a07g043u # RZ/G2UL > > > > Is this really needed? As far as we know, RZ/Five and RZ/G2UL do use the > > same I/O blocks? > > OK, Just thought their DEVID is different and they use RISC-V instead of ARM64. > I agree it uses identical IP blocks. > > May be I can drop this patch, if it is not really needed. Please let me know. Please see my response in https://lore.kernel.org/r/CAMuHMdUZw5bxUgEif=pT-2Gm1ha-Z01r+AJ6ieC62SwkfMYD5Q@xxxxxxxxxxxxxx/ Let's continue the discussion there... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
