Re: [PATCH 1/2] arm64: dts: renesas: r8a779f0: Add IPMMU nodes

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Hi Shimodan-san,

On Tue, Jan 25, 2022 at 2:00 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> Add IPMMU nodes for r8a779f0.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
> @@ -164,6 +164,52 @@ dmac1: dma-controller@e7351000 {
>                         dma-channels = <16>;
>                 };
>
> +               ipmmu_rt0: iommu@ee480000 {
> +                       compatible = "renesas,ipmmu-r8a779f0",
> +                                    "renesas,rcar-gen4-ipmmu";
> +                       reg = <0 0xee480000 0 0x20000>;
> +                       renesas,ipmmu-main = <&ipmmu_mm 10>;
> +                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +                       #iommu-cells = <1>;
> +               };
> +
> +               ipmmu_rt1: iommu@ee4c0000 {
> +                       compatible = "renesas,ipmmu-r8a779f0",
> +                                    "renesas,rcar-gen4-ipmmu";
> +                       reg = <0 0xee4c0000 0 0x20000>;
> +                       renesas,ipmmu-main = <&ipmmu_mm 19>;
> +                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +                       #iommu-cells = <1>;
> +               };
> +
> +               ipmmu_ds0: iommu@eed00000 {
> +                       compatible = "renesas,ipmmu-r8a779f0",
> +                                    "renesas,rcar-gen4-ipmmu";
> +                       reg = <0 0xeed00000 0 0x20000>;
> +                       renesas,ipmmu-main = <&ipmmu_mm 0>;
> +                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +                       #iommu-cells = <1>;
> +               };
> +
> +               ipmmu_hsc: iommu@eed40000 {
> +                       compatible = "renesas,ipmmu-r8a779f0",
> +                                    "renesas,rcar-gen4-ipmmu";
> +                       reg = <0 0xeed40000 0 0x20000>;
> +                       renesas,ipmmu-main = <&ipmmu_mm 2>;

Bit 2 nor HSC are documented in the MMU Interrupt Status Register
(IMSSTR) register in Rev. 0.51 of the R-Car S4 Hardware User's Manual.

> +                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +                       #iommu-cells = <1>;
> +               };
> +
> +               ipmmu_mm: iommu@eefc0000 {
> +                       compatible = "renesas,ipmmu-r8a779f0",
> +                                    "renesas,rcar-gen4-ipmmu";
> +                       reg = <0 0xeefc0000 0 0x20000>;
> +                       interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> +                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +                       #iommu-cells = <1>;
> +               };
> +

The rest looks good to me.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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