Hi Geert,
Quoting Geert Uytterhoeven (2022-01-18 16:52:08)
> Rename the MOD_SEL2_* definitions, to match the bitfield order in
> IPxSRy_* definitions and in MOD_SEL* definitions in other drivers.
>
> No changes in generated code.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
I've looked through and the changes seem consistent as far as I can see.
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
> ---
> To be queued in renesas-pinctrl for v5.18.
>
> drivers/pinctrl/renesas/pfc-r8a779a0.c | 42 +++++++++++++-------------
> 1 file changed, 21 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
> index 155294d0dd5abfb4..4a668a04b7ca6820 100644
> --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
> @@ -576,23 +576,23 @@ FM(IP0SR5_27_24) IP0SR5_27_24 FM(IP1SR5_27_24) IP1SR5_27_24 FM(IP2SR5_27_24) IP2
> FM(IP0SR5_31_28) IP0SR5_31_28 FM(IP1SR5_31_28) IP1SR5_31_28 FM(IP2SR5_31_28) IP2SR5_31_28
>
> /* MOD_SEL2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */
> -#define MOD_SEL2_14_15 FM(SEL_I2C6_0) F_(0, 0) F_(0, 0) FM(SEL_I2C6_3)
> -#define MOD_SEL2_12_13 FM(SEL_I2C5_0) F_(0, 0) F_(0, 0) FM(SEL_I2C5_3)
> -#define MOD_SEL2_10_11 FM(SEL_I2C4_0) F_(0, 0) F_(0, 0) FM(SEL_I2C4_3)
> -#define MOD_SEL2_8_9 FM(SEL_I2C3_0) F_(0, 0) F_(0, 0) FM(SEL_I2C3_3)
> -#define MOD_SEL2_6_7 FM(SEL_I2C2_0) F_(0, 0) F_(0, 0) FM(SEL_I2C2_3)
> -#define MOD_SEL2_4_5 FM(SEL_I2C1_0) F_(0, 0) F_(0, 0) FM(SEL_I2C1_3)
> -#define MOD_SEL2_2_3 FM(SEL_I2C0_0) F_(0, 0) F_(0, 0) FM(SEL_I2C0_3)
> +#define MOD_SEL2_15_14 FM(SEL_I2C6_0) F_(0, 0) F_(0, 0) FM(SEL_I2C6_3)
> +#define MOD_SEL2_13_12 FM(SEL_I2C5_0) F_(0, 0) F_(0, 0) FM(SEL_I2C5_3)
> +#define MOD_SEL2_11_10 FM(SEL_I2C4_0) F_(0, 0) F_(0, 0) FM(SEL_I2C4_3)
> +#define MOD_SEL2_9_8 FM(SEL_I2C3_0) F_(0, 0) F_(0, 0) FM(SEL_I2C3_3)
> +#define MOD_SEL2_7_6 FM(SEL_I2C2_0) F_(0, 0) F_(0, 0) FM(SEL_I2C2_3)
> +#define MOD_SEL2_5_4 FM(SEL_I2C1_0) F_(0, 0) F_(0, 0) FM(SEL_I2C1_3)
> +#define MOD_SEL2_3_2 FM(SEL_I2C0_0) F_(0, 0) F_(0, 0) FM(SEL_I2C0_3)
>
> #define PINMUX_MOD_SELS \
> \
> -MOD_SEL2_14_15 \
> -MOD_SEL2_12_13 \
> -MOD_SEL2_10_11 \
> -MOD_SEL2_8_9 \
> -MOD_SEL2_6_7 \
> -MOD_SEL2_4_5 \
> -MOD_SEL2_2_3
> +MOD_SEL2_15_14 \
> +MOD_SEL2_13_12 \
> +MOD_SEL2_11_10 \
> +MOD_SEL2_9_8 \
> +MOD_SEL2_7_6 \
> +MOD_SEL2_5_4 \
> +MOD_SEL2_3_2
>
> #define PINMUX_PHYS \
> FM(SCL0) FM(SDA0) FM(SCL1) FM(SDA1) FM(SCL2) FM(SDA2) FM(SCL3) FM(SDA3) \
> @@ -3666,13 +3666,13 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
> /* RESERVED 19, 18, 17, 16 */
> 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
> - MOD_SEL2_14_15
> - MOD_SEL2_12_13
> - MOD_SEL2_10_11
> - MOD_SEL2_8_9
> - MOD_SEL2_6_7
> - MOD_SEL2_4_5
> - MOD_SEL2_2_3
> + MOD_SEL2_15_14
> + MOD_SEL2_13_12
> + MOD_SEL2_11_10
> + MOD_SEL2_9_8
> + MOD_SEL2_7_6
> + MOD_SEL2_5_4
> + MOD_SEL2_3_2
> 0, 0,
> 0, 0, ))
> },
> --
> 2.25.1
>
