Re: [PATCH 0/2] arm64: dts: renesas: r8a779a0: Add INTC-EX support

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Hi Geert,

Quoting Geert Uytterhoeven (2021-06-24 09:07:30)
> Hi Kieran,
> 
> On Wed, Jun 23, 2021 at 6:13 PM Kieran Bingham
> <kieran.bingham@xxxxxxxxxxxxxxxx> wrote:
> > On 23/06/2021 16:02, Geert Uytterhoeven wrote:
> > > This patch series adds support for the Interrupt Controller for External
> > > Devices (INT-EC) in the Renesas R-Car V3U (r8a779a0) SoC.
> > >
> > > As there are two known issues, I'm posting this to a limited audience:
> > >
> > >   1. External interrupts have not been tested.
> > >
> > >      Kieran: perhaps IRQ0 can be tested on Falcon with the MIPI DSI/eDP
> > >      bridge, by changing
> > >
> > >        -    interrupt-parent = <&gpio1>;
> > >        -    interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
> > >        +    interrupt-parent = <&intc_ex>;
> > >        +    interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> > >
> > >      ? The "ti,sn65dsi86" driver doesn't seem to use interrupts, though,
> > >      so I don't know how feasible this is.
> >
> > I can add an interrupt handler if that's what you need, but I suspect
> > that the change here simply 're-routes' the interrupt through the
> > intc_ex so that it still needs an interrupt to be generated by the
> > SN65DSI86? is that right?
> 
> Correct, you need to make the SN65DSI86 generate an interrupt, too.
> No idea how to do that...

   o/ Oh oh I do I do ... (now).

I've added a handler, enabled all interrupts on the device and given
myself an interrupt storm:

 95:       3203      irqc   0 Level     sn65dsi86-irq

So I believe I can now (finally) add a 

Tested-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>

here.

And I'll continue working on the interrupt handling for the SN65DSI86 to
see if I can add hotplug detection over interrupts.



> 
> > >      Alternatively, with physical access, IRQ0 is available on test
> > >      point CP47, and IRQ2 on the GPIO CN.
> >
> > I do have physical access, so I can trigger this - Is there a suitable
> > voltage or condition I can apply? (I.e. take a signal from a nearby pin
> > to short it?)
> 
> As IRQ0 is driven by the single gate U59, you better don't cause logic
> conflicts, and play with IRQ2 instead.
> 
> Note that high level is SPI_D1.8V/3.3V, which is 1.8V by default!
> The GPIO CN connector carries a.o. SPI_D1.8V/3.3V and GND.
> Internal pull-up should be enabled for IRQ2 by reset state, but you
> may want to measure the pin's voltage to be sure.
> 
> To configure pin control, you need to add the following, and hook it
> up to the pfc node:
> 
>         irq2_pins: irq2 {
>                 groups = "intc_ex_irq2";
>                 function = "intc_ex";
>         };
> 
> You should be able to test this using gpio-keys, with a key subnode that
> has an interrupts instead of a gpios property.
> 
> This might be a good opportunity to wire up the slide and push switches
> (SW46-49) as gpio-keys, too...
> 
> Thanks!
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds




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