Hi Wolfram,
CC Chris Brandt
On Fri, Dec 17, 2021 at 11:16 AM Wolfram Sang <wsa@xxxxxxxxxx> wrote:
> On Fri, Dec 17, 2021 at 10:02:46AM +0100, Miquel Raynal wrote:
> > Introduce Renesas RZ/N1x NAND controller driver which supports:
> > - All ONFI timing modes
> > - Different configurations of its internal ECC controller
> > - On-die (not tested) and software ECC support
> > - Several chips (not tested)
> > - Subpage accesses
> > - DMA and PIO
> >
> > This controller was originally provided by Evatronix before being bought
> > by Cadence.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
> > Tested-by: Ralph Siemsen <ralph.siemsen@xxxxxxxxxx>
>
> This IP core is also available on some Renesas R-Car Gen3 SoCs. I don't
> have a board with NAND equipped, so I sadly cannot test your patch and
> can only say that the code looks like it is in a really good shape and
> can only suggest some renaming.
Also on RZ/A2M.
RZ/A1 seems to use a different one.
Note that RZ/N1 NANDC claims to support up to ONFI2.2, while
R-Car Gen3 and RZ/A2M do ONFI1.x only?
Chris: usually you are good at IP history ;-) Do you have anything to add?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
