Hi Biju,
On Wed, Dec 8, 2021 at 3:27 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Add TSU node to RZ/G2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> @@ -539,6 +539,16 @@
> };
> };
>
> + tsu: thermal@10059400 {
> + compatible = "renesas,r9a07g044-tsu",
> + "renesas,rzg2l-tsu";
> + reg = <0 0x10059400 0 0x400>;
> + clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
> + resets = <&cpg R9A07G044_TSU_PRESETN>;
> + power-domains = <&cpg>;
> + #thermal-sensor-cells = <1>;
> + };
> +
OK.
> sbc: spi@10060000 {
> compatible = "renesas,r9a07g044-rpc-if",
> "renesas,rzg2l-rpc-if";
> @@ -902,6 +912,22 @@
> };
> };
>
> + thermal-zones {
> + cpu-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> + thermal-sensors = <&tsu 0>;
> +
> + trips {
> + sensor_crit: sensor-crit {
> + temperature = <125000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> + };
> +
LGTM (I'm no thermal expert, so an additional pair of eyes wouldn't hurt), so
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v5.17.
> timer {
> compatible = "arm,armv8-timer";
> interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
