RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
deassert the reset line before accessing any registers.
This patch adds an entry point for RZ/G2L so that we can deassert
the reset line in probe callback.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
drivers/clocksource/renesas-ostm.c | 38 ++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c
index 3d06ba66008c..6b28c45c86f7 100644
--- a/drivers/clocksource/renesas-ostm.c
+++ b/drivers/clocksource/renesas-ostm.c
@@ -9,6 +9,8 @@
#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
#include <linux/sched_clock.h>
#include <linux/slab.h>
@@ -209,3 +211,39 @@ static int __init ostm_init(struct device_node *np)
}
TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
+
+#ifdef CONFIG_ARCH_R9A07G044
+static int __init ostm_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct reset_control *rstc;
+ int ret;
+
+ rstc = devm_reset_control_get_exclusive(dev, NULL);
+ if (IS_ERR(rstc))
+ return dev_err_probe(dev, PTR_ERR(rstc), "failed to get reset");
+
+ reset_control_deassert(rstc);
+
+ ret = ostm_init(dev->of_node);
+ if (ret) {
+ reset_control_assert(rstc);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct of_device_id ostm_of_table[] = {
+ { .compatible = "renesas,rzg2l-ostm", },
+ { }
+};
+
+static struct platform_driver ostm_device_driver = {
+ .driver = {
+ .name = "rzg2l_ostm",
+ .of_match_table = of_match_ptr(ostm_of_table),
+ },
+};
+builtin_platform_driver_probe(ostm_device_driver, ostm_probe);
+#endif
--
2.17.1
