Hi Wolfram, On Wed, Nov 3, 2021 at 8:41 AM Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote: > > Hi Prabhakar, > > > Oops I missed that, does the below look good? > > Yes, only a minor nit. > > > > > #define RPCIF_PHYADD_ADD_MD 0x00 > > #define RPCIF_PHYADD_ADD_RDLSEL 0x22 > > #define RPCIF_PHYADD_ADD_FDLSEL 0x24 > > #define RPCIF_PHYADD_ADD_RDLMON 0x26 > > #define RPCIF_PHYADD_ADD_FDLMON 0x28 > > > > #define RPCIF_PHYADD_ACCEN BIT(31) > > #define RPCIF_PHYADD_RW BIT(30) > > Maybe we could leave this because we don't use it? You decide. > Agreed will drop RPCIF_PHYADD_RW macro. > > > + regmap_write(rpc->regmap, RPCIF_PHYWR, 0x00000030); > > > + regmap_write(rpc->regmap, RPCIF_PHYADD, 0x80000032); > > > > > For the above do you have any suggestions? As I couldn't find any > > details about it or shall I just go with magic numbers for now? > > Ack. I couldn't find docs about these as well. I suggest to add a > comment where this value came from. We can ask the BSP and/or HW team > for details and update this pair incrementally. > Thanks, I'll add a comment stating the values have come from the RZ/G2L HW manual. Cheers, Prabhakar > > thanks, once we agree upon above I shall re-spin v3. > > Cool, looking forward to it! > > Happy hacking, > > Wolfram >
