On 10/1/21 6:06 PM, Biju Das wrote:
> Initialize GbEthernet E-MAC found on RZ/G2L SoC.
> This patch also renames ravb_set_rate to ravb_set_rate_rcar and
> ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with
> the naming convention used in sh_eth driver.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> RFC->v1:
> * Moved CSR0 intialization to later patch.
> * started using ravb_modify for initializing link registers.
> ---
> drivers/net/ethernet/renesas/ravb.h | 20 +++++++--
> drivers/net/ethernet/renesas/ravb_main.c | 55 ++++++++++++++++++++----
> 2 files changed, 62 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h
> index d83d3b4f3f5f..5dc1324786e0 100644
> --- a/drivers/net/ethernet/renesas/ravb.h
> +++ b/drivers/net/ethernet/renesas/ravb.h
[...]
> @@ -824,6 +826,7 @@ enum ECSR_BIT {
> ECSR_MPD = 0x00000002,
> ECSR_LCHNG = 0x00000004,
> ECSR_PHYI = 0x00000008,
> + ECSR_PFRI = 0x00000010,
Documented on gen3 and RZ/G2L only?
[...]
> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
> index 3e694738e683..9a4888543384 100644
> --- a/drivers/net/ethernet/renesas/ravb_main.c
> +++ b/drivers/net/ethernet/renesas/ravb_main.c
[...]
> @@ -449,10 +461,35 @@ static int ravb_ring_init(struct net_device *ndev, int q)
>
> static void ravb_emac_init_gbeth(struct net_device *ndev)
> {
> - /* Place holder */
> + struct ravb_private *priv = netdev_priv(ndev);
> +
> + /* Receive frame limit set register */
> + ravb_write(ndev, GBETH_RX_BUFF_MAX + ETH_FCS_LEN, RFLR);
> +
> + /* PAUSE prohibition */
Should be:
/* EMAC Mode: PAUSE prohibition; Duplex; TX; RX */
> + ravb_write(ndev, ECMR_ZPF | ((priv->duplex > 0) ? ECMR_DM : 0) |
> + ECMR_TE | ECMR_RE | ECMR_RCPT |
> + ECMR_TXF | ECMR_RXF | ECMR_PRM, ECMR);
> +
> + ravb_set_rate_gbeth(ndev);
> +
> + /* Set MAC address */
> + ravb_write(ndev,
> + (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) |
> + (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR);
> + ravb_write(ndev, (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR);
> +
> + /* E-MAC status register clear */
> + ravb_write(ndev, ECSR_ICD | ECSR_LCHNG | ECSR_PFRI, ECSR);
> +
> + /* E-MAC interrupt enable register */
> + ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
Too much repetitive code, I think...
> +
> + ravb_modify(ndev, CXR31, CXR31_SEL_LINK1, 0);
> + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0, CXR31_SEL_LINK0);
Can't be done in a single RMW?
[...]
MBR, Sergey
