Hi Laurent, On Wed, Jul 28, 2021 at 6:26 PM Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx> wrote: > The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It > can operate in either DSI or CSI-2 mode, with up to four data lanes. > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx> > Reviewed-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx> Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml > @@ -0,0 +1,118 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas R-Car MIPI DSI/CSI-2 Encoder > + > +maintainers: > + - Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx> > + > +description: | > + This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas > + R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up > + to four data lanes. > + > +properties: > + compatible: > + enum: > + - renesas,r8a779a0-dsi-csi2-tx # for V3U > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Functional clock > + - description: DSI (and CSI-2) functional clock > + - description: PLL reference clock > + > + clock-names: > + items: > + - const: fck > + - const: dsi > + - const: pll No interrupts? The hardware manual says there are 9 interrupts. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
