Describe all Ethernet PHY reset GPIOs on R-Car Gen3 boards, to avoid
relying solely on boot loaders to bring PHYs out of reset.
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
This assumes the CPLD on v3hsk takes care of the PHY reset, like it is
documented to do on v3msk.
---
arch/arm64/boot/dts/renesas/draak.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 1 +
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 2 ++
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 2 ++
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 2 ++
5 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/draak.dtsi b/arch/arm64/boot/dts/renesas/draak.dtsi
index 5f5a0bb2da86cc57..eb0327c0df48f2e3 100644
--- a/arch/arm64/boot/dts/renesas/draak.dtsi
+++ b/arch/arm64/boot/dts/renesas/draak.dtsi
@@ -249,6 +249,7 @@ phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio5>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
/*
* TX clock internal delay mode is required for reliable
* 1Gbps communication using the KSZ9031RNX phy present on
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index c7451973f8a5b2a7..6586a3bd51b4aad6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -98,6 +98,7 @@ phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
};
};
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
index 2f77ec4ed7e16166..39f3e6cbba3d500f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "r8a77970.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Renesas V3M Starter Kit board";
@@ -113,6 +114,7 @@ phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
};
};
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 4cb5bfa6932d5809..3d6d10c82f48d667 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "r8a77980.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Renesas Condor board based on r8a77980";
@@ -138,6 +139,7 @@ phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
};
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
index ca69d1b1d67af047..1d09d8867651a06b 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "r8a77980.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Renesas V3H Starter Kit board";
@@ -118,6 +119,7 @@ phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
};
--
2.25.1
