Hi Sergey,
> From: Sergey Shtylyov, Sent: Wednesday, September 8, 2021 4:30 AM
>
> On 9/7/21 2:29 PM, Yoshihiro Shimoda wrote:
>
> > The cur_tx counter must be incremented after TACT bit of
> > txdesc->status was set. However, a CPU is possible to reorder
> > instructions and/or memory accesses between cur_tx and
> > txdesc->status. And then, if TX interrupt happened at such a
> > timing, the sh_eth_tx_free() may free the descriptor wrongly.
> > So, add wmb() before cur_tx++.
>
> Not dma_wmb()? :-)
On armv8, dma_wmb() is DMB OSHST, and wmb() is DSB ST.
IIUC, DMB OSHST is not affected the ordering of instructions.
So, we have to use wmb().
> > Otherwise NETDEV WATCHDOG timeout is possible to happen.
> >
> > Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet")
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
>
> Reviewed-by: Sergey Shtylyov <s.shtylyov@xxxxxx>
Thank you for your review!
Best regards,
Yoshihiro Shimoda
