Hi Biju,
On Mon, Aug 30, 2021 at 10:36 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > Subject: RE: [PATCH v3 3/4] clk: renesas: rzg2l: Add support to handle
> > coupled clocks
> > > On Sun, Aug 15, 2021 at 12:30 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > wrote:
> > > > The AXI and CHI clocks use the same register bit for controlling
> > > > clock output. Add a new clock type for coupled clocks, which sets
> > > > the CPG_CLKON_ETH.CLK[01]_ON bit when at least one clock is enabled,
> > > > and clears the bit only when both clocks are disabled.
> > > >
> > > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > > ---
> > > > v2->v3:
> > > > * Reworked as per Geert's suggestion
> > > > * Added enabled flag to track the status of clock, if it is coupled
> > > > with another clock
> > > > * Introduced siblings pointer which points to the other coupled
> > > > clock
> > > > * coupled clock linking is done during module clk register.
> > > > * rzg2l_mod_clock_is_enabled function returns soft state of the
> > > > module clocks, if it is coupled with another clock
> > > > * Updated the commit header
> > > You forgot to initialize mstp_clock.enabled to match the current
> > > hardware state.
> >
> > OK. will initialize mstp_clock.enabled to match the current hardware
> > state.
>
> While working on this, I found a bug in clk driver with patch
> ef3c613ccd68 ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
>
> As per H/W manual(0.50), clock monitor status "1" means clock is supplied and
> "0" means clock supply is stopped.
>
> But the "rzg2l_mod_clock_is_enabled" function returns inverted value instead.
Oops...
> Due to this wrong status, The unused_clk_function never switch off the unused clocks,
> before spawning before init.
>
> After fixing "rzg2l_mod_clock_is_enabled" function and found that board is not booting.
> Reason is, unused_clk_function turns off IA_55 and dmac clocks.
>
> On further investigation, turning off IA55_CLK[1] and DMAC_ACLK[2]
> leading GIC interrupts failure.
>
> I made IA55_CLK and DMAC_ACLK as critical clocks as even if, we disable the corresponding driver,
> GIC interrupts should work and with that I am able to mount rootFS.
>
> So I guess fixing "rzg2l_mod_clock_is_enabled" and Adding critical clocks "IA55_CLK" and "DMAC_ACLK"
> Should be a single patch??
Depends on the order, if they are separate patches ;-)
I think it makes sense to have two separate patches, and thus add
the critical clocks first.
> Then I tested DMA it was failing, as driver is not turning ON DMA_PCLK. So added PM
> Routines to handle DMA clocks and with that DMA driver is working. This will be a separate
> Patch for dmac driver.
OK.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
