The DMAC and EMAC blocks of Gigabit Ethernet IP found on RZ/G2L SoC are similar to the R-Car Ethernet AVB IP. The Gigabit Ethernet IP consists of Ethernet controller (E-MAC), Internal TCP/IP Offload Engine (TOE) and Dedicated Direct memory access controller (DMAC). With a few changes in the driver we can support both IPs. This patch series aims to add factorisation code to support RZ/G2L SoC, hardware feature bits for gPTP feature, Multiple irq feature and optional reset support. Ref:- * https://lore.kernel.org/linux-renesas-soc/TYCPR01MB59334319695607A2683C1A5E86E59@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/T/#t Biju Das (13): ravb: Remove the macros NUM_TX_DESC_GEN[23] ravb: Add multi_irq to struct ravb_hw_info ravb: Add no_ptp_cfg_active to struct ravb_hw_info ravb: Add ptp_cfg_active to struct ravb_hw_info ravb: Factorise ravb_ring_free function ravb: Factorise ravb_ring_format function ravb: Factorise ravb_ring_init function ravb: Factorise ravb_rx function ravb: Factorise ravb_adjust_link function ravb: Factorise ravb_set_features ravb: Factorise ravb_dmac_init function ravb: Factorise ravb_emac_init function ravb: Add reset support drivers/net/ethernet/renesas/ravb.h | 23 +- drivers/net/ethernet/renesas/ravb_main.c | 272 ++++++++++++++++------- drivers/net/ethernet/renesas/ravb_ptp.c | 8 +- 3 files changed, 204 insertions(+), 99 deletions(-) -- 2.17.1
