On Sun, Aug 15, 2021 at 12:30 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Ethernet reference clock can be sourced from PLL5_FOUT3 or PLL6. Add
> support for ethernet source clock selection using SEL_PLL_6_2 mux.
>
> This patch also renames the PLL5_DIV2 core clock to PLL5_2_DIV12 to match
> with the register description as mentioned in RZ/G2L HW manual (Rev.0.50).
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
