Hi Daniel, > > > If CMT instance has at least two channels, one channel will be used > > > as a clock source and another one used as a clock event device. > > > In that case, IRQ is not requested for clock source channel so > > > sh_cmt_clock_event_program_verify() might work incorrectly. > > > Besides, when a channel is only used for clock source, don't need to > > > re-set the next match_value since it should be maximum timeout as > > > it still is. > > > > > > On the other hand, due to no IRQ, total_cycles is not counted up > > > when reaches compare match time (timer counter resets to zero), > > > so sh_cmt_clocksource_read() returns unexpected value. > > > Therefore, use 64-bit clocksoure's mask for 32-bit or 16-bit variants > > > will also lead to wrong delta calculation. Hence, this mask should > > > correspond to timer counter width, and above function just returns > > > the raw value of timer counter register. > > > > I'm not getting the 'ch->cmt->num_channels == 1' change, can you explain? > > My understanding is that if more then one channel is available the > channel used as clocksource is used without an interrupt. This was not > addressed in the patches listed as fixes. This patch fixes this multi > channel use-case while still retaining the old behavior for for the case > where only one channel is available (ch->cmt->num_channels == > 1). Did Niklas answer help you? Happy hacking, Wolfram
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