Hi Biju, Mike, Stephen, Arnd, Olof, On Sat, Jun 26, 2021 at 10:13 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > This patch series aims to update clock and reset definitions as per > RZ/G2L_clock_list_r02_02.xlsx and RZ/G2L HW(Rev.0.50) manual. > > As per this, we need to separate resets from module clocks in order to > handle it efficiently. > > Added support for multi clock PM support and updated clock driver enties. > > This patch series is tested with USB Host, USB Device, I2C, DMAC and SSI. > > This patch series is based on [1] and [2] > [1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/commit/?h=renesas-clk-for-v5.15 > [2] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/ > > v3->v4: > * Fixed the code comment onoff to bit. > v2->v3 > * Improved clk/reset code as per Geert's suggestion. > * Added Geert's Rb tag > > v1->v2 > * Updated reset entries > * Added Geert's Rb tag for multi clock PM support. > > v1: > * https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=503135 Thanks for your series! For those who missed the story behind this: after queuing the initial support for the new Renesas RZ/G2{L,LC} SoCs for v5.14, we discovered an issue with the way how clocks and resets are handled for modules more complex than serial ports and i2c controllers. Fixing that required a redesign of the DT binding definitions, which are a hard dependency for both the clock/reset driver and DTS. Hence to avoid regressions and bisection issues, I plan to queue the first 7 patches (with patches 5-7 squashed together) in renesas-fixes for v5.14 after v5.14-rc1 has been released. The last 3 patches can be handled normally again, and are to be queued in renesas-devel for v5.15. Sorry for the mess, and thanks for your understanding! > Biju Das (10): > drivers: clk: renesas: renesas-rzg2l-cpg: Add multi clock PM support > drivers: clk: renesas: r9a07g044-cpg: Rename divider table > drivers: clk: renesas: r9a07g044-cpg: Fix P1 Clock > drivers: clk: renesas: r9a07g044-cpg: Add P2 Clock support > dt-bindings: clk: r9a07g044-cpg: Update clock/reset definitions > drivers: clk: renesas: r9a07g044-cpg: Update {GIC,IA55,SCIF} > clock/reset entries > arm64: dts: renesas: r9a07g044: Update SCIF0 clock/reset > drivers: clk: renesas: r9a07g044-cpg: Add I2C clocks/resets > drivers: clk: renesas: r9a07g044-cpg: Add DMAC clocks/resets > arm64: dts: renesas: r9a07g044: Add I2C nodes > > arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 84 +++++++- > drivers/clk/renesas/r9a07g044-cpg.c | 99 ++++++--- > drivers/clk/renesas/renesas-rzg2l-cpg.c | 110 +++++----- > drivers/clk/renesas/renesas-rzg2l-cpg.h | 37 +++- > include/dt-bindings/clock/r9a07g044-cpg.h | 236 ++++++++++++++++----- > 5 files changed, 419 insertions(+), 147 deletions(-) Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
