RZ/G2{L,LC,UL} SoC's have LSI_DEVID register to retrieve SoC product and
revision information.
RZ/G{L,LC,UL} SoC's have 28-bit product-id compared to other R-Car and
RZ/G2{E,H,M,N} SoC's hence a new compatible string "renesas,devid" is
added.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/arm/renesas,prr.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/renesas,prr.yaml b/Documentation/devicetree/bindings/arm/renesas,prr.yaml
index 1f80767da38b..94afeccba29f 100644
--- a/Documentation/devicetree/bindings/arm/renesas,prr.yaml
+++ b/Documentation/devicetree/bindings/arm/renesas,prr.yaml
@@ -12,14 +12,16 @@ maintainers:
description: |
Most Renesas ARM SoCs have a Product Register or Boundary Scan ID
- Register that allows to retrieve SoC product and revision information.
- If present, a device node for this register should be added.
+ Register or LSI Device ID Register that allows to retrieve SoC product
+ and revision information. If present, a device node for this register
+ should be added.
properties:
compatible:
enum:
- renesas,prr
- renesas,bsid
+ - renesas,devid
reg:
maxItems: 1
--
2.17.1
