Hi Geert, Valentine,
On 04/05/2021 10:14, Geert Uytterhoeven wrote:
> From: Valentine Barshak <valentine.barshak@xxxxxxxxxxxxxxxxxx>
>
> This adds X1 clock which supplies a frequency of 148.5 MHz.
> This clock is connected to the external dot clock input signal.
>
> Signed-off-by: Valentine Barshak <valentine.barshak@xxxxxxxxxxxxxxxxxx>
> [geert: Verified schematics]
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---
> Untested due to lack of hardware
Tested on my Eagle-V3M with running the DU tests:
Testing composition on CRTC 46: SUCCESS
Testing connector HDMI-A-1: SUCCESS
Testing plane formats: SUCCESS
Testing legacy mode set on connector HDMI-A-1: SUCCESS
Testing modes on connector HDMI-A-1: SUCCESS
Testing atomic mode set on connector HDMI-A-1: SUCCESS
Testing page flip on connector HDMI-A-1: SUCCESS
Testing plane positioning boundaries: SUCCESS
and verifying that the output visible was as expected.
Tested-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> index 874a7fc2730b00db..5c84681703edad2e 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> @@ -73,6 +73,12 @@ memory@48000000 {
> /* first 128MB is reserved for secure area. */
> reg = <0x0 0x48000000 0x0 0x38000000>;
> };
> +
> + x1_clk: x1-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <148500000>;
> + };
> };
>
> &avb {
> @@ -104,6 +110,8 @@ channel0 {
> };
>
> &du {
> + clocks = <&cpg CPG_MOD 724>, <&x1_clk>;
> + clock-names = "du.0", "dclkin.0";
> status = "okay";
> };
>
>
