[PATCH/RFC 1/2] ARM: dts: r8a7778: Correct internal delay for i2c[123]

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According to the R-Car M1A Hardware User's Manual Rev. 1.00, the LSI
internal delay for I2C instances 1 to 3 is 5 ns (typ.), which differs
from the default 50 ns as specified for instance 0.

Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
i2c[123] are not used in upstream DTS files.
---
 arch/arm/boot/dts/r8a7778.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index c9f8735860bf824c..95efbafb0b7077a2 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -166,6 +166,7 @@ i2c1: i2c@ffc71000 {
 		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp0_clks R8A7778_CLK_I2C1>;
 		power-domains = <&cpg_clocks>;
+		i2c-scl-internal-delay-ns = <5>;
 		status = "disabled";
 	};
 
@@ -177,6 +178,7 @@ i2c2: i2c@ffc72000 {
 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp0_clks R8A7778_CLK_I2C2>;
 		power-domains = <&cpg_clocks>;
+		i2c-scl-internal-delay-ns = <5>;
 		status = "disabled";
 	};
 
@@ -188,6 +190,7 @@ i2c3: i2c@ffc73000 {
 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp0_clks R8A7778_CLK_I2C3>;
 		power-domains = <&cpg_clocks>;
+		i2c-scl-internal-delay-ns = <5>;
 		status = "disabled";
 	};
 
-- 
2.25.1




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