Hi Niklas,
On Tue, Mar 30, 2021 at 12:33 AM Niklas Söderlund
<niklas.soderlund+renesas@xxxxxxxxxxxx> wrote:
> Add support for the ISPCS clocks on V3U.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx>
Thanks for your patch!
> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> @@ -180,6 +180,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> DEF_MOD("i2c4", 522, R8A779A0_CLK_S1D4),
> DEF_MOD("i2c5", 523, R8A779A0_CLK_S1D4),
> DEF_MOD("i2c6", 524, R8A779A0_CLK_S1D4),
> + DEF_MOD("ispcs0", 612, R8A779A0_CLK_S1D1),
> + DEF_MOD("ispcs1", 613, R8A779A0_CLK_S1D1),
> + DEF_MOD("ispcs2", 614, R8A779A0_CLK_S1D1),
> + DEF_MOD("ispcs3", 615, R8A779A0_CLK_S1D1),
Unfortunately the parent clock is not explicitly documented in the
hardware manual. But S1D1 does match max. 479 Mpixel/s.
> DEF_MOD("msi0", 618, R8A779A0_CLK_MSO),
> DEF_MOD("msi1", 619, R8A779A0_CLK_MSO),
> DEF_MOD("msi2", 620, R8A779A0_CLK_MSO),
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk-for-v5.14.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
