Hi Geert,
Thanks for your feedback.
On 2021-03-09 17:31:09 +0100, Geert Uytterhoeven wrote:
> Hi Niklas,
>
> On Tue, Mar 9, 2021 at 5:14 PM Niklas Söderlund
> <niklas.soderlund+renesas@xxxxxxxxxxxx> wrote:
> > Implement support for the CL16M clock on V3U.
> >
> > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > @@ -147,6 +147,8 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
> >
> > DEF_SD("sd0", R8A779A0_CLK_SD0, CLK_SDSRC, 0x870),
> >
> > + DEF_FIXED("cl16m", R8A779A0_CLK_CL16M, CLK_PLL1_DIV2, 64, 1),
>
> Is this any different from the "cl16mck" added by Wolfram, and
> already present in renesas-clk?
No they are the same and as I see Wolfram's "cl16mck" name is now in
your tree I will switch to it. Will post a v3 of 2/2 which uses it and
drop this patch.
>
> > +
> > DEF_DIV6P1("mso", R8A779A0_CLK_MSO, CLK_PLL5_DIV4, 0x87c),
> > DEF_DIV6P1("canfd", R8A779A0_CLK_CANFD, CLK_PLL5_DIV4, 0x878),
> > DEF_DIV6P1("csi0", R8A779A0_CLK_CSI0, CLK_PLL5_DIV4, 0x880),
> > diff --git a/include/dt-bindings/clock/r8a779a0-cpg-mssr.h b/include/dt-bindings/clock/r8a779a0-cpg-mssr.h
> > index f1d737ca7ca1a7ca..2974dc6035f7b936 100644
> > --- a/include/dt-bindings/clock/r8a779a0-cpg-mssr.h
> > +++ b/include/dt-bindings/clock/r8a779a0-cpg-mssr.h
> > @@ -51,5 +51,6 @@
> > #define R8A779A0_CLK_CBFUSA 40
> > #define R8A779A0_CLK_R 41
> > #define R8A779A0_CLK_OSC 42
> > +#define R8A779A0_CLK_CL16M 43
>
> We already have R8A779A0_CLK_CL16MCK?
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
--
Regards,
Niklas Söderlund
