Hi! This series provides basic V3U pin control support, up to and including the SCIF pins. This revision includes fixes for numerous issues found by Geert in his review; see below for details. CU Uli Changes since v1: - add support for different voltage levels - add more PORT_GP_CFG_{2,31} macros - add non-GP pins - add A/B pins/groups for TCLK{1,2}, {RX,TX}1, FXR_TXDA, RXDA_EXTFXR - add SEL_I2C*_0 to MOD_SEL2 - add PINMUX_PHYS, fix multiplexing of S{DA,CL}[0-6] - add AVB{0,1}_{MAGIC,MDC,MDIO,TXREFCLK} - remove undocumented POC3 - add human-readable pin names to pinmux_bias_regs[] - use generic rcar_pinmux_{get,set}_bias() ops - tweak coding style and commit messages - add Reviewed-Bys where applicable Ulrich Hecht (5): pinctrl: renesas: implement unlock register masks pinctrl: renesas: add I/O voltage level flag pinctrl: renesas: add PORT_GP_CFG_{2,31} macros pinctrl: renesas: Initial R8A779A0 (V3U) PFC support pinctrl: renesas: r8a779a0: Add SCIF pins, groups and functions drivers/pinctrl/renesas/Kconfig | 5 + drivers/pinctrl/renesas/Makefile | 1 + drivers/pinctrl/renesas/core.c | 34 +- drivers/pinctrl/renesas/pfc-r8a779a0.c | 2683 ++++++++++++++++++++++++ drivers/pinctrl/renesas/pinctrl.c | 16 +- drivers/pinctrl/renesas/sh_pfc.h | 23 +- 6 files changed, 2748 insertions(+), 14 deletions(-) create mode 100644 drivers/pinctrl/renesas/pfc-r8a779a0.c -- 2.20.1