The SoC was expecting two clock sources with different frequencies.
One to support 44.1KHz and one to support 48KHz. With the newly added
ability to configure the programmably clock, configure both clocks.
Beacause the SoC is expecting a fixed clock/oscillator, it doesn't
attempt to get and enable the clock for audio_clk_a. The choice to
use a fixed-factor-clock was due to the fact that it will automatically
enable the programmable clock frequency without change any code.
Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
---
.../boot/dts/renesas/beacon-renesom-baseboard.dtsi | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index 3c84e060c69f..5c09e64001cc 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -250,9 +250,12 @@ ss_ep: endpoint {
};
&audio_clk_a {
- clock-frequency = <24576000>;
- assigned-clocks = <&versaclock6_bb 4>;
- assigned-clock-rates = <24576000>;
+ /delete-property/ clock-frequency;
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-mult = <1>;
+ clock-div = <1>;
+ clocks = <&versaclock6_bb 4>;
};
&audio_clk_b {
@@ -591,7 +594,7 @@ sound_pins: sound {
};
sound_clk_pins: sound_clk {
- groups = "audio_clk_a_a";
+ groups = "audio_clk_a_a", "audio_clk_b_a";
function = "audio_clk";
};
--
2.25.1
