Hi Uli,
On Thu, Nov 26, 2020 at 6:22 PM Ulrich Hecht <uli+renesas@xxxxxxxx> wrote:
> This patch adds TMU TCLK1-4 pins, groups and functions to the R8A779A0
> (V3U) SoC.
>
> Signed-off-by: Ulrich Hecht <uli+renesas@xxxxxxxx>
Thanks for your patch!
> ---
> drivers/pinctrl/renesas/pfc-r8a779a0.c | 47 ++++++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
>
> diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
> index a83b6fa9ab9e..4aa725b3fbca 100644
> --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
> @@ -2502,6 +2502,39 @@ static const unsigned int scif_clk_mux[] = {
> SCIF_CLK_MARK,
> };
>
> +/* - TMU -------------------------------------------------------------------- */
> +static const unsigned int tmu_tclk1_pins[] = {
> + /* TCLK1 */
> + RCAR_GP_PIN(2, 23),
> +};
> +static const unsigned int tmu_tclk1_mux[] = {
> + TCLK1_MARK,
> +};
According to the R-Car V3U Pin Multiplex Table, there are two sets.
The above definition corresponds to set A.
Set B is available on pin GP1_23.
> +
> +static const unsigned int tmu_tclk2_pins[] = {
> + /* TCLK2 */
> + RCAR_GP_PIN(2, 24),
> +};
> +static const unsigned int tmu_tclk2_mux[] = {
> + TCLK2_MARK,
> +};
According to the R-Car V3U Pin Multiplex Table, there are two sets.
The above definition corresponds to set A.
Set B is available on pin GP2_10.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
