Hi Uli,
On Thu, Nov 26, 2020 at 6:21 PM Ulrich Hecht <uli+renesas@xxxxxxxx> wrote:
> This patch adds SCIF0, 1, 3 and 4 pins, groups and functions for the
> R8A779A0 (V3U) SoC.
>
> Signed-off-by: Ulrich Hecht <uli+renesas@xxxxxxxx>
Thanks for your patch!
> --- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
> +/* - SCIF1 ------------------------------------------------------------------ */
> +static const unsigned int scif1_data_pins[] = {
> + /* RX1, TX1 */
> + RCAR_GP_PIN(1, 21), RCAR_GP_PIN(1, 22),
> +};
> +static const unsigned int scif1_data_mux[] = {
> + RX1_MARK, TX1_MARK,
> +};
According to the R-Car V3U Pin Multiplex Table, there are two sets.
Table 6.14 in the User's Manual agrees.
The above definition corresponds to set A.
Set B is available on pins GP3_02 and GP3_01.
> +static const unsigned int scif1_clk_pins[] = {
> + /* SCK1 */
> + RCAR_GP_PIN(1, 18),
> +};
> +static const unsigned int scif1_clk_mux[] = {
> + SCK1_MARK,
> +};
> +static const unsigned int scif1_ctrl_pins[] = {
> + /* RTS1#, CTS1# */
> + RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19),
> +};
> +static const unsigned int scif1_ctrl_mux[] = {
> + RTS1_N_MARK, CTS1_N_MARK,
> +};
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
