Hi Shimoda-san,
On Wed, Oct 21, 2020 at 10:07 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> > From: Yoshihiro Shimoda, Sent: Wednesday, October 21, 2020 4:41 PM
> > > From: Geert Uytterhoeven, Sent: Monday, October 19, 2020 9:06 PM
> > >
> > > Add the module clocks used by the Pin Function Controller (PFC) and
> > > General Purpose Input/Output (GPIO) blocks, and their parent clock CP.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> > > ---
> > > Untested on actual hardware.
> > >
> > > Note that the BSP uses MAIN instead of EXTAL, just like for the CBFUSA
> > > clock. However, according to Figure 8.1.1 ("Block Diagram of CPG (R-Car
> > > V3U-AD)") in the R-Car V3U Series User's Manual Rev. 0.5, the parent of
> > > the CP clock is EXTAL, which matches earlier R-Car Gen3 SoCs.
> >
> > Thank you for the patch!
> >
> > Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
>
> I'm afraid but, since the upstream code doesn't have the following "vin3[567]"
> lines, we should remove it from this patch. After fixed it,
> you can use my Reviewed-by :)
Right, I had marked Jacopo's VIN clock patch for application to
renesas-clk-for-v5.11, but haven't actually done that, only in my local
tree.
But probably it does make sense to reorder the patches, and apply the
GPIO one first.
> >@@ -180,6 +181,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> > DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
> > DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
> > DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
