Hi Geert-san,
> From: Geert Uytterhoeven, Sent: Tuesday, September 8, 2020 8:36 PM
>
> Hi Shimoda-san,
>
> On Mon, Sep 7, 2020 at 11:20 AM Yoshihiro Shimoda
> <yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> > Add support for R-Car V3U (R8A779A0) to the R-Car RST driver.
> >
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
>
> Thanks for your patch!
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Thank you for your review!
> > --- a/drivers/soc/renesas/rcar-rst.c
> > +++ b/drivers/soc/renesas/rcar-rst.c
> > @@ -37,6 +37,10 @@ static const struct rst_config rcar_rst_gen3 __initconst = {
> > .modemr = 0x60,
> > };
> >
> > +static const struct rst_config rcar_rst_r8a779a0 __initconst = {
> > + .modemr = 0x00, /* MODEMR0 and it has CPG related bits */
>
> Do you need the bits from MODEMR1, too?
> Perhaps the time is ripe to add rcar_rst_read_mode_pins64(),
> so users can access more than 32 bits on SoCs that provide it (R-Car
> V3H and V3U)?
I think so. However, main users of rcar_rst_read_mode_pins()
are cpg drivers for now. So, perhaps no one uses more than 32 bits for now.
> At least the numbering is sane on R-Car V3U. On R-Car V3H, MD29 and
> higher are stored starting at bit 1 of the second MODEMR register...
Oh, it's strange assignment...
Best regards,
Yoshihiro Shimoda
