On 06/19/2020 03:58 PM, Geert Uytterhoeven wrote:
>> From: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
>> Subject: pinctrl: sh-pfc: r8a77970: Add RPC pins, groups, and functions
>>
>> Add the RPC pins/groups/functions to the R8A77970 PFC driver.
>> They can be used if an Octal-SPI flash or HyperFlash is connected.
>>
>> Based on the patch by Dmitry Shifrin <dmitry.shifrin@xxxxxxxxxxxxxxxxxx>.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
>> --- renesas-drivers.orig/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
>> +++ renesas-drivers/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
>> @@ -1416,6 +1416,64 @@ static const unsigned int qspi1_data4_mu
>> QSPI1_IO2_MARK, QSPI1_IO3_MARK
>> };
>>
>> +/* - RPC -------------------------------------------------------------------- */
>> +static const unsigned int rpc_clk1_pins[] = {
>> + /* Octal-SPI flash: C/SCLK */
>> + RCAR_GP_PIN(5, 0),
>> +};
>> +static const unsigned int rpc_clk1_mux[] = {
>> + QSPI0_SPCLK_MARK,
>> +};
>> +static const unsigned int rpc_clk2_pins[] = {
>> + /* HyperFlash: CK, CK# */
>> + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 6),
>> +};
>> +static const unsigned int rpc_clk2_mux[] = {
>> + QSPI0_SPCLK_MARK, QSPI1_SPCLK_MARK,
>> +};
>> +static const unsigned int rpc_ctrl_pins[] = {
>> + /* Octal-SPI flash: S#/CS, DQS */
>> + /* HyperFlash: CS#, RDS */
>> + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
>> +};
>> +static const unsigned int rpc_ctrl_mux[] = {
>> + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
>
> Shouldn't the above read
>
> QSPI0_SSL_MARK, QSPI1_SSL_MARK,
>
> ?
Indeed! Stupid copy&paste error... :-(
> I seem to have overlooked the same issue in commit aa2165cf2ece9176
> ("pinctrl: sh-pfc: r8a77980: Add RPC pins, groups, and functions") in
> sh-pfc-for-v5.9, which I can fix myself.
>
> With the above sorted out:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> and will queue in sh-pfc-for-v5.9 after fixing.
So I do need to repost? OK...
> Gr{oetje,eeting}s,
>
> Geert
MBR, Sergei
