> On May 8, 2020 11:59 AM Geert Uytterhoeven <geert+renesas@xxxxxxxxx> wrote:
>
>
> The Clock Pulse Generator (CPG) device node lacks the extal2 clock.
> This may lead to a failure registering the "r" clock, or to a wrong
> parent for the "usb24s" clock, depending on MD_CK2 pin configuration and
> boot loader CPG_USBCKCR register configuration.
>
> This went unnoticed, as this does not affect the single upstream board
> configuration, which relies on the first clock input only.
>
> Fixes: d9ffd583bf345e2e ("ARM: shmobile: r8a7740: add SoC clocks to DTS")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Reviewed-by: Ulrich Hecht <uli+renesas@xxxxxxxx>
CU
Uli
