On 2/8/20 7:41 PM, Andrew Murray wrote:
> On Sat, Feb 08, 2020 at 10:46:25AM +0100, Marek Vasut wrote:
>> On 12/16/19 1:06 PM, Andrew Murray wrote:
>>> On Fri, Oct 04, 2019 at 02:29:41PM +0100, Andrew Murray wrote:
>>>> The outbound windows (PCIEPAUR(x), PCIEPALR(x)) describe a mapping between
>>>> a CPU address (which is determined by the window number 'x') and a
>>>> programmed PCI address - Thus allowing the controller to translate CPU
>>>> accesses into PCI accesses.
>>>>
>>>> However the existing code incorrectly writes the CPU address - lets fix
>>>> this by writing the PCI address instead.
>>>>
>>>> For memory transactions, existing DT users describe a 1:1 identity mapping
>>>> and thus this change should have no effect. However the same isn't true for
>>>> I/O.
>>>>
>>>> Fixes: c25da4778803 ("PCI: rcar: Add Renesas R-Car PCIe driver")
>>>> Signed-off-by: Andrew Murray <andrew.murray@xxxxxxx>
>>>>
>>>> ---
>>>> This hasn't been tested, so keen for someone to give it a try.
>>>>
>>>> Also keen for someone to confirm my understanding that the RCar windows
>>>> expect PCI addresses and that res->start refers to CPU addresses. If this
>>>> is correct then it's possible the I/O doesn't work correctly.
>>>
>>> Marek/Yoshihiro - any feedback on this?
>>
>> It does indeed look correct,
>> Reviewed-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxx>
>>
>> # On R8A77951 Salvator-XS with Intel 8086:f1a5 600P SSD
>> # On R8A77965 Salvator-XS with Intel 8086:10d3 82574L NIC
>> Tested-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxx>
>
> Thanks for testing - much appreciated!
>
> Andrew Murray
Can this be applied then ?
