The chapter 7.1 "D-PHY Physical Layer Option" of the CSI2 specification
states that non-continuous clock behavior is optional, i.e. the Clock Lane
can remain in high-speed mode between the transmission of data packets.
Therefore waiting for the stop state (LP-11) on the Clock Lane is wrong and
will cause timeouts when a CSI2 transmitter with continuous clock behavior
is attached to R-Car CSI2 receiver. So wait only for the stop state on the
Data Lanes.
Signed-off-by: Michael Rodin <mrodin@xxxxxxxxxxxxxx>
---
drivers/media/platform/rcar-vin/rcar-csi2.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/media/platform/rcar-vin/rcar-csi2.c b/drivers/media/platform/rcar-vin/rcar-csi2.c
index faa9fb2..6d1992a 100644
--- a/drivers/media/platform/rcar-vin/rcar-csi2.c
+++ b/drivers/media/platform/rcar-vin/rcar-csi2.c
@@ -416,8 +416,7 @@ static int rcsi2_wait_phy_start(struct rcar_csi2 *priv)
for (timeout = 0; timeout <= 20; timeout++) {
const u32 lane_mask = (1 << priv->lanes) - 1;
- if ((rcsi2_read(priv, PHCLM_REG) & PHCLM_STOPSTATECKL) &&
- (rcsi2_read(priv, PHDLM_REG) & lane_mask) == lane_mask)
+ if ((rcsi2_read(priv, PHDLM_REG) & lane_mask) == lane_mask)
return 0;
usleep_range(1000, 2000);
--
2.7.4
