Hello! Thank you for having mty on CC:, I might have missed oit otherwise... :-) On 12/06/2019 04:41 PM, Chris Brandt wrote: > The Renesas SPI Bus Space Controller (SPIBSC) HW was specifically designed for > accessing Serial flash devices (QSPI, The initial design did only support SPI, hence the SPI in the name. > HyperFlash, Octa Flash). In the hardware Only added in "2nd generation" controllers, like on R-Car gen3, RZ/A2. > manuals, it is almost always labeled as the "Renesas SPI Multi I/O Bus Controller". Not seeing "Renesas" but the rest looks consistent across the manuals. > However, the HW IP is usually referred to within Renesas as the "SPI BSC". Poor name for the 2nd generation controllers which also support at least HyperFlash. > Yes, the R-Car team nicknamed it RPC (for "Reduced Pin Count" flash) after HyperFash > support was added...but I personally think that RPC is not a good name for this > HW block. SPIBSC is also misleading... RPC-IF seems misleading too as it's only spelled out in the R-Car gen3 and RZ/A2H manuals. > This driver has been tested on an RZ/A1H RSK and RZ/A2M EVB. In the SPI mode only, I assume? What I have now is the core driver (or rather a library) placed under drivers/memory/ and the SPI and HyperFlash front ends in drivers/spi/ and drivers/mtd/hyperbus/ respectfully. I'm almost ready to post the core driver/bindings, the SPI driver still needs some Mark Brown's comments addressed, and the HyperFlash driver is also ready but needs the existing HyperBus infrastructure properly fixed up (having a draft patch now)... > The testing mostly consisted of formatting an area as JFFS2 and doing copying > of files and such. Did the same (or at least tried to :-) and I must admit that writing doesn't work with any of the front ends... I still need to get this fixed. > While the HW changed a little between the RZ/A1 and RZ/A2 generations, the IP > block in the RZ/A2M was taken from the R-Car H3 design, so in theory this > driver should work for R-Car Gen3 as well. I don't think it's a good idea to use the SPI dedicated driver on R-Car gen3, I would rather see the RZ/A1 using the RPC-IF driver/library to reduce the code duplication... > ========================= > Version 2 changes > ========================= > * I got rid of all the critical clock stuff. The idea is is that if you are > planning on using the SPI BSC, even in XIP mode, it should be described in DT. > > * There is no actual 'runtime pm' implmented in the driver at the moment, and > so just the standard enable/disable clock API is used. My code does have RPM enabled and used. > * The compatible string "jedec,spi-nor" will be used to determine if a spi controller > needs to be regitered or not. At the moment there is no setup needed for > running in XIP mode, so we just need to signal that the peripheral clock should > be left on and then we're done. [...] MBR, Sergei
