Document the bindings used by the Renesas SPI bus space controller. Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx> --- v2: * change to YAML format * add interrupts property * Used more terms directly from the hardware manual --- .../bindings/spi/renesas,spibsc.yaml | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/renesas,spibsc.yaml diff --git a/Documentation/devicetree/bindings/spi/renesas,spibsc.yaml b/Documentation/devicetree/bindings/spi/renesas,spibsc.yaml new file mode 100644 index 000000000000..afbdc0824cc6 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/renesas,spibsc.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/renesas,spibsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SPI Bus Space Controller (SPIBSC) Device Tree Bindings + +description: | + Otherwise referred to as the "SPI Multi I/O Bus Controller" in SoC hardware + manuals. This controller was designed specifically for accessing Serial flash + devices such as SPI Flash, HyperFlash and OctaFlash. The HW can operate in two + modes. One mode allows for normal byte by byte access (refereed to as + "Manual Mode"). The other mode allows for direct memory mapped access (read + only) to the flash area by the CPU (refereed to as "External Address Space + Read Mode"). + +allOf: + - $ref: spi-controller.yaml# + +maintainers: + - Chris Brandt <chris.brandt@xxxxxxxxxxx> + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,r7s72100-spibsc # RZ/A1 + - renesas,r7s9210-spibsc # RZ/A2 + + reg: + minItems: 2 + maxItems: 2 + items: + - description: Registers + - description: Memory Mapped Address Space + + interrupts: + description: Some HW versions do not contain interrupts + maxItems: 1 + + clocks: + maxItems: 1 + + flash: + description: | + (Optional) In order to use the HW for R/W access ("Manual Mode"), a "flash" + subnode must be present with a "compatible" property that contains + "jedec,spi-nor". If a spi-nor property is not found, the HW is assumed to be + already operating in "External Address Space Read Mode". + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + +examples: + - | + # This example is for "Manual Mode" + spibsc: spi@1f800000 { + compatible = "renesas,r7s9210-spibsc"; + reg = <0x1f800000 0x100>, <0x20000000 0x10000000>; + clocks = <&cpg CPG_MOD 83>; + power-domains = <&cpg>; + interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0000000 { + label = "u-boot"; + reg = <0x00000000 0x80000>; + }; + }; + }; + + # This example is for "External Address Space Read Mode" + spibsc: spi@1f800000 { + compatible = "renesas,r7s9210-spibsc"; + reg = <0x1f800000 0x100>, <0x20000000 0x10000000>; + clocks = <&cpg CPG_MOD 83>; + power-domains = <&cpg>; + interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + }; + flash@20000000 { + compatible = "mtd-rom"; + probe-type = "direct-mapped"; + reg = <0x20000000 0x4000000>; + bank-width = <4>; + device-width = <1>; + #address-cells = <1>; + #size-cells = <1>; + + partition@80000 { + label ="uboot_env"; + reg = <0x00080000 0x010000>; + read-only; + }; + }; + +... -- 2.23.0
