Re: [PATCH 6/6] dt-bindings: spi: Document Renesas SPIBSC bindings

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Hi Chris,

On Tue, Dec 3, 2019 at 11:33 PM Chris Brandt <Chris.Brandt@xxxxxxxxxxx> wrote:
> On Tue, Dec 3, 2019, Geert Uytterhoeven wrote:
> > > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-spibsc.txt
> > > +Required properties:
> > > +- compatible: should be an SoC-specific compatible value, followed by
> > > +               "renesas,spibsc" as a fallback.
> > > +               supported SoC-specific values are:
> > > +               "renesas,r7s72100-spibsc"       (RZ/A1)
> > > +               "renesas,r7s9210-spibsc"        (RZ/A2)
> >
> > Is the fallback valid for RZ/A1, which has its own special match entry in the
> > driver?
> > Will it be valid for R-Car Gen3?
> > If not, you may want to drop it completely.
>
> The fallback would still work for RZ/A1, you just would not be able to
> set the baud rate. But, I have no problem dropping the fallback. I'm fine
> with having a compatible string for each SoC that is known to work for.
>
> I have not tried it with Gen3, but I would guess there will be some minor
> difference that will needed to be accounted for.

OK.

> > > +- reg: should contain three register areas:
> > > +       first for the base address of SPIBSC registers,
> > > +       second for the direct mapping read mode
> > > +- clocks: should contain the clock phandle/specifier pair for the module
> > clock.
> > > +- power-domains: should contain the power domain phandle/specifier pair.
> > > +- #address-cells: should be 1
> > > +- #size-cells: should be 0
> > > +- flash: should be represented by a subnode of the SPIBSC node,
> > > +        its "compatible" property contains "jedec,spi-nor" if SPI is used.
> >
> > What about the "mtd-rom" use for e.g. XIP?
>
> But "mtd-rom" doesn't really have anything to do with the functionality of the
> driver when it is being used in "SPI mode".

Correct. But DT describes hardware.  If the FLASH is used in direct mapped
mode, that should be described in DT.

> Maybe I just remove any mention of this for now.
>
> > interrupts? RZ/A2M seems to have an SPIBSC interrupt, RZ/A1 hasn't.
>
> There was never any interrupts in the SPIBSC.
> But it looks like when they added HyperFlash and OctaFlash support, they put
> in some interrupts for that.
> And now that I look at it, they are for pins labeled RPC_INT, RPC_WC, RPC_RESET.
> (I just realized that "RPC" stands for "Reduced Pin Count")
>
> So....am I supposed to add in that interrupt even though I'm not planning on using
> it??

DT describes hardware, not driver limitations.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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