On Fri, Sep 27, 2019 at 04:59:37AM +0900, Yoshihiro Kaneko wrote: > Convert R-/SH-Mobile IRQPin Controller bindings documentation to json-schema. > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> > --- > > v2 > - correct Geert-san's E-mail address. > - delete Guennadi-san from the maintainer of this binding. > - give 'sense-bitfield-width' the uint32 type. > - describe 'control-parent' property as a boolean. > > .../interrupt-controller/renesas,intc-irqpin.txt | 62 ------------- > .../interrupt-controller/renesas,intc-irqpin.yaml | 102 +++++++++++++++++++++ > 2 files changed, 102 insertions(+), 62 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.yaml > diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.yaml > new file mode 100644 > index 0000000..5925890 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.yaml > @@ -0,0 +1,102 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: DT bindings for the R-/SH-Mobile irqpin controller > + > +maintainers: > + - Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,intc-irqpin-r8a7740 # R-Mobile A1 > + - renesas,intc-irqpin-r8a7778 # R-Car M1A > + - renesas,intc-irqpin-r8a7779 # R-Car H1 > + - renesas,intc-irqpin-sh73a0 # SH-Mobile AG5 > + - const: renesas,intc-irqpin > + > + reg: > + # Base address and length of each register bank used by the external > + # IRQ pins driven by the interrupt controller hardware module. The base > + # addresses, length and number of required register banks varies with > + # soctype. > + minItems: 1 > + maxItems: 6 Every entry is the same thing? > + > + interrupt-controller: true > + # Identifies the node as an interrupt controller. No need to define standard properties. > + > + '#interrupt-cells': > + # an interrupt index and flags, as defined in interrupts.txt in this > + # directory. Same here. > + const: 2 > + > + interrupts: > + # Must contain a list of interrupt specifiers. For each interrupt > + # provided by this irqpin controller instance, there must be one entry, > + # referring to the corresponding parent interrupt. And here. > + maxItems: 1 > + > + sense-bitfield-width: > + # width of a single sense bitfield in the SENSE register, if different > + # from the default 4 bits Use 'description' > + $ref: /schemas/types.yaml#/definitions/uint32 > + maxItems: 1 Update dtschema and run 'make dt_binding_check' and I think you'll find this fails now. The problem is $ref needs to be under an 'allOf' if there's additional schema. maxItems is also wrong here. 'uint32' type implies that. What you should have is a definition of possible values using enum or minimum/maximum. > + > + control-parent: > + # disable and enable interrupts on the parent interrupt controller, > + # needed for some broken implementations Use 'description' > + type: boolean > + > + clocks: > + # Must contain a reference to the functional clock. This property is > + # mandatory if the hardware implements a controllable functional clock for > + # the irqpin controller instance. Drop this. A single entry doesn't need more description. > + maxItems: 1 > + > + power-domains: > + # Must contain a reference to the power domain. This property is > + # mandatory if the irqpin controller instance is part of a controllable > + # power domain. Same here. > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupt-controller > + - '#interrupt-cells' > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/r8a7740-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + irqpin1: interrupt-controller@e6900004 { > + compatible = "renesas,intc-irqpin-r8a7740", > + "renesas,intc-irqpin"; > + #interrupt-cells = <2>; > + interrupt-controller; > + reg = <0xe6900004 4>, > + <0xe6900014 4>, > + <0xe6900024 1>, > + <0xe6900044 1>, > + <0xe6900064 1>; Really only 1 byte? > + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH > + GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; <> each interrupt specifier. Above you said there is only 1 interrupt... > + clocks = <&mstp2_clks R8A7740_CLK_INTCA>; > + power-domains = <&pd_a4s>; > + }; > -- > 1.9.1 >
